Synopsys Announces DesignWare DDR4 Memory Interface IP

News release:

Synopsys Announces DesignWare DDR4 Memory Interface IP

Memory Controller and PHY Support Multiple DDR Standards While Reducing Latency and Standby Power

MOUNTAIN VIEW, Calif., Sept. 18, 2012 /PRNewswire/ --
Highlights:

• Synopsys expands its industry-leading DesignWare® DDR Memory Interface IP family to include support for DDR4 SDRAMs
• Backward compatibility with DDR3 and LPDDR2/3 mobile SDRAMs gives SoC designers flexibility as they transition from one SDRAM standard to the next
• New DDR4 IP offers more features with up to 50 percent lower latency than the previous generation
• DDR4 memory controller and PHY are connected by a standard DFI 3.1 interface to streamline connections to custom PHYs and controllers

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced the expansion of its DesignWare DDR interface IP portfolio to include support for next-generation SDRAMs based on the emerging DDR4 standard. By supporting DDR4 as well as DDR3 and LPDDR2/3 in a single core, the DesignWare DDR solution enables designers to interface with either high-performance or low-power SDRAMs in the same system-on-chip (SoC), which is a key requirement of many SoCs such as applications processors for smartphones and tablets.
"Synopsys' support for DDR4 memory is an important contribution to building a robust DDR4 ecosystem," said Robert Feurle, vice president of DRAM marketing for Micron Technology, Inc. "DDR4 brings substantial power and performance benefits to the industry, and Micron is aggressively driving its introduction. By implementing their DesignWare DDR Interface IP with backward compatibility in mind, Synopsys is enabling chip developers to bridge the transition from today's DDR3-based SoCs to the upcoming DDR4 designs."
Synopsys' DesignWare DDR4 IP solution consists of the DDR4 multiPHY and Enhanced Universal DDR Memory Controller (uMCTL2) that connect through a commonly used DFI 3.1 interface. The new DDR4 IP supports all key DDR4 features planned for the upcoming JEDEC standard and, compared to the previous version, includes a 13 percent increase in raw bandwidth, up to a 50 percent reduction in overall latency and new low-power features that provide intelligent system monitoring and control to power down elements of the IP as determined by the system's traffic patterns. Real-time scheduling features in Synopsys' unique CAM-based DDR controller can optimize the scheduling of data read/write traffic from multiple hosts, maximizing performance and minimizing latency.
"While the initial target markets for DDR4 are networking, server, and compute platforms, engineers designing for digital TVs, set-top-boxes, multi-function printing, smartphone and tablet applications will also adopt DDR4 DRAM as prices drop and performance improves," said Desi Rhoden, executive vice president, Montage Technology, and JEDEC memory chairman. "Synopsys has leveraged their participation at JEDEC to develop DDR4-compatible products before the actual standard has been released, which is a key benefit of JEDEC membership."
"Synopsys' complete DDR interface IP portfolio includes support for LPDDR, LPDDR2, LPDDR3, DDR, DDR2, and DDR3," said John Koeter, vice president of marketing for IP and systems at Synopsys. "With this announcement, we are broadening our portfolio to include support for DDR4 while maintaining backward compatibility with existing JEDEC standard SDRAMs. As new DDR standards evolve, designers look for reliable solutions. Synopsys' track record of over 320 DDR IP design wins demonstrates that we offer a low-risk path to silicon success."
Availability
Availability for the DesignWare DDR4 multiPHY and Enhanced Universal DDR Memory Controller (uMCTL2) with support for DDR4 is planned for Q4 2012.
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for system-on-chip (SoC) designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP, embedded memories, logic libraries, processor cores and subsystems. To support software development and hardware/software integration of the IP, Synopsys offers drivers, transaction-level models, and prototypes for many of its IP products. Synopsys' HAPS® FPGA-Based Prototyping Solution enables validation of the IP and the SoC in the system context. Synopsys' Virtualizer™ virtual prototyping tool set allows developers to start the development of software for the IP or the entire SoC significantly earlier compared to traditional methods. With a robust IP development methodology, extensive investment in quality, IP prototyping, software development and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit http://www.synopsys.com/designware.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.
Forward Looking Statements
This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including statements regarding the expected availability of Synopsys' DesignWare DDR4 multiPHY and Enhanced Universal DDR Memory Controller (uMCTL2) with support for DDR4. These statements are based on current expectations and beliefs. Actual results could differ materially from those described by these statements due to risks and uncertainties including, but not limited to, unforeseen production or delivery delays, failure to perform as expected, product errors or defects and other risks detailed in Synopsys' filings with the U.S. Securities and Exchange Commission, including those described in the "Risk Factors" section of Synopsys' Quarterly Report on Form 10-Q for the fiscal quarter ended July 31, 2012.

Microsoft Signs Licensing Agreement With Research In Motion

Press release:

Microsoft Signs Licensing Agreement With Research In Motion

Sept. 18, 2012

exFAT file technology helps mobile industry leader provide cutting-edge capabilities to customers.

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REDMOND, Wash. — Sept. 18, 2012 — Microsoft Corp. announced today that Microsoft and Research In Motion (RIM) have signed a patent licensing agreement that gives RIM broad access to the latest Extended File Allocation Table (exFAT) for certain BlackBerry devices of RIM. exFAT is a modern file system from Microsoft that facilitates large files for audiovisual media and enables seamless data portability and an easy interchange between desktop PCs and other electronic devices.

exFAT improves on its predecessor, the FAT system, and greatly expands the size of files that flash memory devices can handle by five times over previous FAT technology. It also increases the speed with which those files can be accessed. The exFAT file system not only facilitates large files for use of audiovisual media, it enables seamless data portability and an easy interchange between desktop PCs and a variety of electronic devices.

“Today’s smartphones and tablets require the capacity to display richer images and data than traditional cellular phones,” said David Kaefer, general manager of Intellectual Property (IP) Licensing at Microsoft. “This agreement with RIM highlights how a modern file system, such as exFAT can help directly address the specific needs of customers in the mobile industry.”

Microsoft’s Commitment to Intellectual Property Collaboration

Microsoft offers flexible IP licensing programs that give companies access to many of the foundational technologies in its own products, allowing those companies to build devices, applications and services that work seamlessly with each other.

Since Microsoft launched its IP licensing program in December 2003, the company has entered into more than 1100 licensing agreements and continues to develop programs that make it possible for customers, partners and competitors to access its IP portfolio. The program was developed to open access to Microsoft’s significant R&D investments and its growing, broad patent and IP portfolio.

Microsoft has entered into similar licensing agreements with several leading consumer electronics manufacturers through its IP licensing program, including Panasonic Corp., SANYO Electric Company Ltd., Sony Corp. and Canon Inc.

More information on Microsoft’s IP licensing program is available athttp://www.microsoft.com/iplicensing, and information specifically related to Microsoft’s exFAT licensing program is available here.

Founded in 1975, Microsoft (Nasdaq “MSFT”) is the worldwide leader in software, services and solutions that help people and businesses realize their full potential.

Synopsys' Open-Source Liberty Format to Incorporate On-Chip Variation Extensions

Press release:

Synopsys' Open-Source Liberty Format to Incorporate On-Chip Variation Extensions

Collaborating with Standards Board Industry Leaders to Ensure Broad Ecosystem Enablement

MOUNTAIN VIEW, Calif., Sept. 5, 2012 /PRNewswire/ --
Highlights:

• OCV extensions help standardize usage of the popular stage-based Advanced OCV (AOCV) modeling approach for 40- and 28-nm
• Liberty Technical Advisory Board expected to finalize and ratify new extensions in November 2012

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced it intends to incorporate on-chip variation (OCV) extensions in its open-source Liberty™ library format, the de-facto modeling standard  for integrated circuit (IC) implementation and signoff. The new extensions will help standardize usage of the popular stage-based Advanced OCV (AOCV) modeling approach for 40- and 28-nm processes nodes. The final format extensions and ratification as part of the Liberty standard will be completed with the guidance and assistance of the Liberty Technical Advisory Board.
The Liberty library format is the semiconductor industry's most widely adopted library standard used by virtually all EDA implementation, analysis and library characterization tools as the library model exchange for timing, noise, power and test behavior.  In May 2006, an industry-wide Liberty Technical Advisory Board was formed to facilitate the evolution of the Liberty library modeling standard. The Liberty Technical Advisory Board functions under the auspices of the IEEE Industry Standards and Technology Organization (IEEE-ISTO). Its 14 member companies represent the broad semiconductor industry including the design community, EDA companies, silicon foundries, and semiconductor intellectual property (IP) companies. A complete list of members can be found at http://opensourceliberty.org/liberty_techadvisory.html. Liberty is available for download to the entire semiconductor design community under standard open-source terms. The latest Liberty syntax specifications and tools can be found at http://www.opensourceliberty.org.
"Standardizing the Liberty format extensions through the Liberty Technical Advisory Board allows the design community and EDA tool suppliers an opportunity to contribute and participate in the standardization process," said Rich Goldman, vice president of corporate marketing and strategic alliances, Synopsys. "In the past 2 years, the Liberty Technical Advisory Board has helped guide the ratification of over 10 new additions to Liberty to improve design for low-power flows."
The standardization of on-chip variation extensions via the Liberty Technical Advisory Board will benefit the semiconductor industry by:

• Allowing broad participation from the design community and EDA tool suppliers on final format
• Ensuring a fast path to a standard that meets the growing needs of EDA tool and IP Library providers
• Providing a foundation and structure for future collaboration and evolution of on-chip variation extensions

AvailabilityThe Liberty Technical Advisory Board is expected to finalize and ratify the OCV extensions to Liberty in November 2012, making it available to open-source licensees shortly thereafter.

• Learn more about Open Source Liberty at: http://www.opensourceliberty.org

About SynopsysSynopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Synopsys Achieves 100th Design Win with its 28-nm DesignWare® IP

Press release:

Synopsys Achieves 100th Design Win with its 28-nm DesignWare® IP

Tens of Millions of Units Shipped and More Than 30 Test Chip Tape-Outs Demonstrates DesignWare IP Robustness

MOUNTAIN VIEW, Calif., Sept. 5, 2012 /PRNewswire/ --
Highlights:

• Full line of  28-nm DesignWare IP includes PHYs for USB, PCI Express, SATA, HDMI, DDR, MIPI, as well as data converters, audio codecs, embedded memories and logic libraries
• Availability spans four leading foundries and 10 unique processes, enabling designers to choose the IP that meets their specific design requirements
• Designed for SoC robustness with exhaustive simulations, reliability analysis and at-speed electrical characterization across process, voltage and temperature corners
• Optimized for a range of applications including mobile applications processors, multimedia graphics, networking and storage

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced the 100th design win of its DesignWare IP optimized for 28-nanometer (nm) processes for multiple leading foundries. The silicon-proven 28-nm portfolio consists of widely-used IP including PHYs for USB, PCI Express, SATA, HDMI, DDR, MIPI, as well as data converters, audio codecs, embedded memories and logic libraries, with tens of millions of units shipped.  Synopsys' 28-nm DesignWare IP has been thoroughly silicon-characterized across process, voltage and temperature (PVT) variations in both High-K Metal Gate and PolySiON technologies to ensure design robustness. By having taped out more than 30 test chips in more than ten different 28-nm process nodes, with products shipping in volume production, Synopsys provides designers with high-quality DesignWare IP solutions that can be quickly integrated into a range of system-on-chip (SoC) applications such as mobile applications processors, multimedia graphics networking and storage with less risk and effort.
"As an established IP provider, Synopsys has an extensive track record of delivering high-quality IP in leading process nodes," said Michael Chang, chairman of technical board at Global Unichip Corp. (GUC). "Our close collaboration with Synopsys through the years has enabled GUC to successfully incorporate a broad range of proven DesignWare IP in our customers' most advanced SoC designs. Synopsys' 28-nm IP will enable us to deliver next-generation designs for our customers with excellent margin and yield, while meeting power, performance and area requirements."
Advanced process geometries present additional design challenges in SoCs and IP development. At the 28-nm process node, design rules, leakage power and I/O voltages are substantially different than those in 40- and 65-nm processes. To address 28-nm design requirements, Synopsys modified key design aspects of its IP, while adhering to industry protocol specifications and ensuring reliable operation. For example, to meet manufacturing requirements, Synopsys implemented more than twice the number of restrictive design rule checks for its 28-nm IP compared to the 65-nm process and eight times the number of PVT corners for thorough validation. Furthermore, Synopsys employed advanced low-power design methodologies to address low leakage requirements.
Synopsys developed its 28-nm DesignWare embedded memories using statistical design methodologies to address design variability challenges and incorporated multiple power management features including source biasing and dual voltage rails to deliver up to 70 percent leakage power reduction. DesignWare Logic Libraries incorporate multiple threshold voltage and long channel devices to reduce SoC leakage power. In addition, the Logic Libraries are characterized across a wide range of corners, enabling designers to reduce dynamic power through the use of Dynamic Voltage and Frequency Scaling (DVFS) techniques. These features and design techniques enable designers to successfully integrate 28-nm DesignWare IP into their advanced SoC designs to improve performance, power and area results.
"Developing 28-nm IP is not for the faint of heart. Synopsys has invested close to 100 staff-years in designing and verifying our 28-nm DesignWare IP to ensure interoperability and design robustness." said John Koeter, vice president of marketing for IP and systems at Synopsys. "Synopsys' user survey data indicates that approximately 50 percent of our customers' next designs will be implemented in 28-nanometer processes, so it is important that Synopsys provide designers with high-quality 28-nanometer IP in the timeframe they need to gain a competitive advantage."
AvailabilityThe DesignWare PHY IP for USB 3.0, USB 2.0, USB HSIC, DDR3/2, LPDDR3/2, PCIe 2.0, SATA I/II/III, HDMI 1.4, MIPI M-PHY, MIPI D-PHY, as well as embedded memories, logic libraries and data converters (analog-to-digital converters and digital-to-analog converters) for select 28-nm processes are available now.
The 28-nm DesignWare audio codecs are scheduled to be available to early adopters in Q4 of 2012.
About DesignWare IPSynopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP, embedded memories, logic libraries, processor cores and subsystems. To support software development and hardware/software integration of the IP, Synopsys offers drivers, transaction-level models, and prototypes for many of its IP products. Synopsys' HAPS® FPGA-Based Prototyping Solution enables validation of the IP and the SoC in the system context. Synopsys' Virtualizer virtual prototyping tool set allows developers to start the development of software for the IP or the entire SoC significantly earlier compared to traditional methods. With a robust IP development methodology, extensive investment in quality, IP prototyping, software development and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware.
About SynopsysSynopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.

ARM and Synopsys Expand Collaboration to Optimize Power and Performance, and Accelerate Design and Verification for ARM Technology-based SoCs

Press release from Synopsys:

ARM and Synopsys Expand Collaboration to Optimize Power and Performance, and Accelerate Design and Verification for ARM Technology-based SoCs

CAMBRIDGE, United Kingdom and MOUNTAIN VIEW, Calif., Aug. 28, 2012 /PRNewswire/ --


Highlights:

• Industry leaders extend collaboration to benefit mutual customers across the broad ARM  partner ecosystem
• Synopsys licenses broad range of energy-efficient, high-performance ARM IP in multi-year agreement
• Collaboration to deliver power and performance optimized methodologies for ARM® Cortex™ processors using Synopsys' Galaxy™ Implementation Platform and ARM Artisan® physical IP and POP™ technology
• Synopsys' next-generation Discovery™ Verification IP (VIP) integrates new tests, checks and verification features to speed verification of AMBA® 4 ACE™-based System-on-Chips (SoCs)

ARM (LON: ARM; Nasdaq: ARMH) and Synopsys, Inc. (Nasdaq: SNPS) have signed a multi-year agreement that expands Synopsys' access to a broad range of ARM intellectual property (IP). The two companies will broaden their collaboration to enable SoC designers to optimize the power and performance of ARM technology-based SoCs with Synopsys Galaxy Implementation Platform and Discovery VIP, while reducing cost and decreasing time to market. Building on previous EDA tools and ARM Cortex-A15 processor license agreements, this new agreement provides Synopsys with access to a range of Cortex processors, including technology needed to implement ARM big.LITTLE™ processing, ARM Artisan physical IP, POP technology optimized for Cortex processor implementation, as well as CoreLink™ interconnect and AMBA 4 ACE system IP.

By expanding their collaboration to include the latest ARM technology, Synopsys will be able to create and deliver optimized tools and methodologies for the implementation and verification of ARM processing subsystems, and ARM will be able to enhance its IP. The ongoing partnership aims to meet demand from designers for SoCs that feature both extreme energy efficiency and high performance. For example, ARM big.LITTLE processing combines Cortex-A15 MPCore™ and Cortex-A7 MPCore processors with ARM CoreLink CCI-400 cache coherent interconnect to allow software to be migrated seamlessly to the optimum processor for each task. This paradigm enables up to 70 percent processor energy savings on common workloads.

"In today's increasingly competitive market environment, optimized solutions from two industry leaders can make a big difference for our partners designing ARM technology-based SoCs by accelerating the design process and driving gains in power and performance," said Simon Segars, executive vice president and general manager, Processor and Physical IP Divisions at ARM. "By providing Synopsys with wider access to industry-leading ARM IP, we are enabling mutual customers to benefit from streamlined design and verification, ultimately, decreasing time to market."

Combining ARM and Synopsys expertise, the optimized implementation flows will use Synopsys Galaxy tools and methodologies as well as ARM Artisan physical IP and POP solutions to better enable designers to produce Cortex-A9, Cortex-A15 and Cortex-A7 processor-based designs faster and with improved performance and power results. This solution is complemented by Synopsys' Virtualizer™ Design Kit (VDK) for ARM big.LITTLE processing, as well as by Synopsys' Discovery Verification IP and Protocol Analyzer for the AMBA 4 ACE specification.

In addition to using the ARM processor-optimized methodologies with Synopsys' Galaxy tools, designers can also use Synopsys' Lynx Design System for additional productivity and predictability through a tapeout-validated, SoC-level implementation flow. Synopsys provides optimized processor implementation training and design assistance to help customers achieve their target performance and power in their chosen semiconductor process technology. Synopsys will also optimize the Discovery Verification Platform for ARM IP. Discovery VIP and Protocol Analyzer integrate additional tests, system monitor checks and other features to accelerate verification of AMBA 4 ACE interconnect-based designs.
"Synopsys tools are used in a significant portion of leading-edge implementations of ARM processor-based SoCs, and our customers are pushing for extreme performance and power efficiency," said Deirdre Hanford, senior vice president, global technical services at Synopsys. "This expanded collaboration enables Synopsys and ARM to deliver the optimized solutions that SoC designers need to meet the power and performance requirements for their ARM-powered designs."

About ARM

ARM designs the technology that is at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM's comprehensive product offering includes RISC microprocessors, graphics processors, video engines, enabling software, cell libraries, embedded memories, high-speed connectivity products, peripherals and development tools. Combined with comprehensive design services, training, support and maintenance, and the company's broad Partner community, they provide a total system solution that offers a fast, reliable path to market for leading electronics companies. Find out more about ARM by following these links:

• ARM website: http://www.arm.com/
• ARM Connected Community: http://www.arm.com/community/
• ARM Blogs: http://blogs.arm.com/
• ARMFlix on YouTube: http://www.youtube.com/user/ARMflix
• ARM on Twitter:
  • http://twitter.com/ARMMobile
  • http://twitter.com/ARMCommunity
  • http://twitter.com/ARMEmbedded
  • http://twitter.com/ARMSoC
  • http://twitter.com/KeilTools
  • http://twitter.com/ARMMultimedia

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

ARM is a registered trademark of ARM Limited. Synopsys is a registered trademark of Synopsys, Inc. All other trademarks mentioned in this release are the intellectual property of their respective owners.

Synopsys Announces Results of Robert S. Hilbert Memorial Optical Design Competition

News release:

Synopsys Announces Results of Robert S. Hilbert Memorial Optical Design Competition

Annual Competition Recognizes Student Achievements in Optical Design

MOUNTAIN VIEW, Calif., Aug. 16, 2012 /PRNewswire/ -- Synopsys, Inc., a world leader in software and IP for semiconductor design, verification and manufacturing, announced today that University of Rochester students Anthony Visconti and Brett Sternfield and University of Alabama in Huntsville student Josh Walters are the winners of the 2012 Robert S. Hilbert Memorial Optical Design Competition. The competition was established in 2000 by Optical Research Associates (ORA^®), now the Optical Solutions Group at Synopsys, and was named in honor of ORA's former president and chief executive officer Robert S. Hilbert. The annual competition is open to students in North America working toward a bachelor's, master's, or Ph.D. degree who utilize Synopsys' CODE V^® or LightTools^® software to perform optical design and engineering research. Awards are granted to students who have submitted papers that demonstrate optical design excellence.
Anthony Visconti of the University of Rochester was recognized for his work on infrared optical imaging using CODE V in his paper titled, "Optical Passive Athermalization Using Schott Chalcogenide Glasses." Applications of Visconti's project include thermal imaging for night vision systems, as well as remote sensing for aerial photography and satellite data collection. Brett Sternfield, also of the University of Rochester, was recognized for his work on a machine vision imaging system using CODE V in his paper titled, "190 Degree FFOV Fisheye for Autonomous Robots." Sternfield presents a method to improve a robot's ability to navigate a new environment and capture images, which can be useful for a wide range of tasks, including search and rescue missions, intelligence gathering and even fast food delivery.
Josh Walters of the University of Alabama in Huntsville was recognized for his project using CODE V titled, "Non-Sequential Modeling of Multi-Aperture Lenslet Array Spectropolarimetic Imager." The goal of Walters' design is to reduce crosstalk in an imaging system that uses an array of lenslets, so that the resulting image of each channel is clearly distinguished. This work will aid those researching the benefits of non-traditional imaging systems, similar to the compound eye found in insects.
"We believe it is important to encourage the next generation of optical engineers by recognizing and showcasing their talents in our annual student design competition," said George Bayz, vice president and general manager of the Optical Solutions Group at Synopsys. "The entries we received reflect strong design concepts that were well executed and presented and show promise for optical systems across a broad range of applications."
The three projects will be on display at SPIE Optics + Photonics (August 12-16, 2012, San Diego, Calif.) in Synopsys' booth 417.
About the Robert S. Hilbert Memorial Optical Design Competition
The annual Robert S. Hilbert Memorial Optical Design Competition recognizes excellence in optical design projects completed by students. The competition honors the memory of Robert Hilbert (1941-2008), former president and chief executive officer of Optical Research Associates, who was deeply committed throughout his career to fostering technical innovation in optics and supporting optics education. The competition is open to students enrolled in a post-secondary degree program in North America, working toward a bachelor's, master's or Ph.D. degree. To participate, students can enter an optical design class assignment or thesis work that uses CODE V or LightTools software. Awards totaling $4,000 are granted each year. For more information, visitwww.opticalres.com/student.
About Synopsys' Optical Solutions Group
Synopsys' Optical Solutions Group, formerly Optical Research Associates, is one of the world's leading developers of optical design and analysis tools, with CODE V imaging design software, LightTools illumination design software and RSoft products for photonic and optical network design. The group also provides optical systems design services, with more than 4,800 completed projects in imaging, illumination and optical systems engineering.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.

Seventh Annual International Microelectronics Olympiad of Armenia to be Hosted by Synopsys in Cooperation with IEEE TTTC

Press release:

Seventh Annual International Microelectronics Olympiad of Armenia to be Hosted by Synopsys in Cooperation with IEEE TTTC

Participation by the world's largest professional engineering association highlights the Olympiad's growing international reputation

YEREVAN, Armenia, Aug. 9, 2012 /PRNewswire/ -- Synopsys, Inc., a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that the Seventh Annual International Microelectronics Olympiad of Armenia will be held on October 4, 2012 in Yerevan, Armenia. For the first time, the event will be held in cooperation with the Institute of Electrical and Electronics Engineers (IEEE) Test Technology Technical Council (TTTC). IEEE's participation highlights the contest's growing international reputation.
Initiated in 2006, the Olympiad is held under the patronage of the Prime Minister of Armenia. Synopsys Armenia CJSC is the general organizer and a sponsor of the Olympiad. The general sponsor is Vivacell-MTS, Armenia's leading mobile operator. The Olympiad is also sponsored by Unicomp CJSC, Enterprise Incubator Foundation, Microsoft RA, Union of Manufacturers and Businessmen of Armenia, Union of Information Technology Enterprises, Arminco CJSC, Viasphere Technopark and INGO ARMENIA ICJSC.
In keeping with the theme of "Meeting the Challenges of Design and Test," the contestants in the Olympiad will compete in the areas of digital IC design and test, analog and mixed-signal IC design and test, semiconductor devices and technology, and mathematic and algorithmic issues of electronic design automation (EDA).
Guided by the motto "Recognize the best, inspire the next," the Olympiad aims to highlight the brightest, most talented engineers under the age of 30. The Olympiad goals are to stimulate further development of microelectronics in Armenia and in the participating countries by: recognizing and inspiring talented engineers; increasing interest in microelectronics among young specialists; discerning the level of knowledge of participants in the field of microelectronics in order to make necessary adjustments to regional educational programs; and creating a community of young specialists involved in microelectronics.
"The first Armenian Microelectronics Olympiad in 2006 attracted 82 participants. The event has since grown to an international contest including numerous award categories and 349 participants from 12 countries," said Rich Goldman, the president of the Olympiad Organizing Committee, CEO of Synopsys Armenia and vice president for Corporate Marketing and Strategic Alliances at Synopsys. "Working with IEEE will enable further growth. As one of the world's most respected and recognized professional engineering societies, the IEEE sponsors more than 1000 annual conferences and meetings in 81 countries and is highly involved in the technical program development of numerous events including trade shows, training workshops, and job fairs. IEEE's recognition of the Olympiad also benefits Armenia by highlighting it as a Center of Excellence for Microelectronics Education."
"This collaboration is a win-win-win situation for IEEE, for the Olympiad, and for Armenia as a country," said Dr. Yervant Zorian, president of the IEEE TTTC and chief architect at Synopsys. "The involvement of IEEE, the largest organization of electrical and electronic engineers, helps the Olympiad gain more international recognition. The Olympiad contributes to IEEE's efforts to encourage and support an interest in technology in young adults; holding the contest in Armenia highlights the country's technical leadership."
"The IEEE TTTC's decision to endorse the Annual International Microelectronics Olympiad is a key acknowledgement of its success in promoting technology development in this region over the past six years," said Vazgen Melikyan, president of the Olympiad Program Committee, director of Synopsys Armenia Educational Department (SAED), honorable scientist of Armenia and Sc.D. professor. "I am confident the cooperation of IEEE TTTC will result in a significantly greater number of highly knowledgeable participants from around the globe."
About IEEE TTTCIEEE is the world's largest professional association dedicated to advancing technological innovation and excellence for the benefit of humanity. Sponsored by IEEE's Computer Society, TTTC is a dedicated council to serve the global test technology professional community through a series of annual conferences, standards, publications, educational and professional activities. For more information, please visit http://tab.computer.org/tttc
About Synopsys Armenia CJSC and Synopsys, Inc. Synopsys, Inc. is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP), prototyping and services used in semiconductor design, verification and manufacturing. Synopsys established a presence in Armenia in 2004 as Synopsys Armenia closed joint stock company (CJSC). Synopsys Armenia CJSC provides R&D and product support in EDA, design for manufacturing (DFM) and the development of semiconductor intellectual property (IP). Employing several hundred qualified Armenian engineers, Synopsys is one of largest IT employers in Armenia. To encourage the highest levels of accomplishment for students in IT, the company sponsors awards and competitions such as theAnnual Educational Awards of the Republic of Armenia (RA) President, and the Annual International Microelectronics Olympiad of Armenia. Synopsys Armenia's investment in the community reaches well beyond IT. In 2010, Synopsys in Armenia was recognized as one of 12 finalists for the U.S. Secretary of State's annual Award for Corporate Excellence (ACE), citing the company's technology and financial leadership as well as its charity work and volunteer activities. Synopsys Armenia CJSC is located in Yerevan. Synopsys, Inc. is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys, Inc. and Synopsys Armenia online at http://www.synopsys.com andhttp://www.synopsys.am.

Synopsys Launches Industry's First Technical Community Site Dedicated to Users of Verification IP

Press release:

Synopsys Launches Industry's First Technical Community Site Dedicated to Users of Verification IP

VIP-Central.org Serves as an Online Resource Connecting Protocol and Verification IP Experts to SoC Verification Engineers

MOUNTAIN VIEW, Calif., Aug. 8, 2012 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced the launch of VIP-Central.org, the first industry-wide, technical community site focused on system-on-chip (SoC) verification engineers and users of verification IP (VIP). The site provides a centralized online resource of relevant forums and blogs focused on verification of industry-standard protocols. VIP-Central.org is the go-to source for the latest technical information and discussions on the use of verification IP and advanced verification methodologies to verify protocol-based IP as well as IP integration, SoC sub-systems and full SoCs. VIP-Central.org aggregates information from industry experts across the verification community, providing best practices and ideas for better verification performance, protocol debug, methodology, verification planning, coverage management and ease-of-use.
"As each new SoC adds the next generations of different IP blocks, IP subsystems and frequent releases of new protocols, SoC companies are required to quickly ramp their verification teams to embrace these changes," said Rich Wawrzyniak, senior market analyst for ASIC and SoC at Semico Research. "The launch of VIP-Central.org as a technical resource for protocol-based verification will improve ramp times, act as a repository of knowledge and expertise for designers, and also enable the verification IP experts in the industry to share their best practices with the verification community."
With the increasing number of complex protocols used in SoCs, verification engineers face a tough challenge to quickly acquire the protocol expertise needed to verify a SoC as well as all of its on-chip fabrics and off-chip interfaces. The challenge is made tougher by the frequent release of new and more sophisticated generations of protocols to improve performance, power and quality of service. Verification engineers must complete many tasks requiring both protocol and methodology expertise including developing environments, integrating VIP, using and modifying test sequences, debugging complex protocol results and analyzing coverage data. VIP-Central.org is designed to help engineers quickly understand the intricacies and foibles of each protocol and how to effectively utilize industry-available verification IP to verify these protocols while employing methodologies such as UVM, OVM and VMM.
"VIP-Central.org represents an important milestone for the VIP user community," said Janick Bergeron, verification fellow at Synopsys. "As protocols become more intricate and SoC verification complexity continues to grow, VIP-Central.org offers a community-driven portal to share the learning from our successful customer VIP engagements, and enable exchange of ideas with other VIP experts, users and the entire SoC verification community."
About VIP-Central.org
VIP-Central.org is an industry-wide community site for system-on-chip (SoC) verification engineers and users of verification IP. It provides a centralized online resource of relevant forums and blogs focusing on verification of today's industry-standard protocols. Visit VIP-Central.org online at http://www.vip-central.org/.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

HIPAA-Compliant Document Management Solution Expands into Global Market

HIPAA-Compliant Document Management Solution Expands Into Global Market by Migrating to Windows Azure Cloud Platform

PaperTracer attracts international customers by migrating to Windows Azure to store, organize and safeguard its sensitive information in security-enhanced Microsoft global datacenters.

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REDMOND, Wash. — March 20, 2012 — PaperTracer, a Jacksonville, Fla.-based document-management service that assures compliance with the Health Insurance Portability and Accountability Act (HIPAA) of 1996, has moved to the Windows Azure cloud platform to deliver its services to customers worldwide. By backing its HIPAA compliance with the security features of Microsoft Corp. datacenters, PaperTracer expects to boost revenues by 30 percent in the first year alone. A subsidiary of Health Asset Management Inc. (HAMi), PaperTracer adopted cloud-computing technologies early on, delivering its Web-based solution as a service since its founding in 1999. For the past decade, PaperTracer has managed and maintained a server infrastructure that it hosted in a dedicated private cloud environment through a third-party provider in Florida. PaperTracer wanted to expand its business overseas but found that potential international customers viewed its single-location¸ U.S.-based infrastructure as a concern. “When customers are storing sensitive information such as patient data or intellectual property, they want to know that their data is stored locally,” said Michael Tarpley, CEO of HAMi. “Customers located outside the U.S. were not inclined to use PaperTracer.” The company resolved to move its services to a public cloud model, eventually narrowing the field to Windows Azure. “The decision to move to Windows Azure was an easy one,” said Keith Hoot, the company’s chief technology officer. “Not only does Microsoft offer security-enhanced global datacenters, but also its brand is recognized as synonymous with reliability.” Working with Microsoft partner Arth Systems, PaperTracer migrated to Windows Azure in April 2011. It hosts its application in Web roles in Windows Azure for background processing tasks and uses Microsoft SQL Azure for data storage. Using Windows Azure, the company packages its application and deploys it to the Microsoft datacenter nearest the customer’s location. PaperTracer recently created a variant that enables small and midsize businesses to take advantage of fast deployment on Windows Azure. Announced as 2EZData in November 2011, the solution is similar to PaperTracer and includes the same HIPAA-compliant features, such as activity-logging at the file level, role-based access controls, and forced password changes and logouts after periods of inactivity. By the end of 2011, the company had two customers in the U.S. and one in India using PaperTracer on Windows Azure. It also had 15 customers in the pipeline for 2EZData, many of which are located in India and other overseas locations. “If it weren’t for using Windows Azure, we would not have closed the deal with our PaperTracer customer in India,” said Rajashree Varma, the director of Global Alliance at HAMi. PaperTracer has traditionally provided customers the HIPAA-compliant features they require in a records management solution, but today it offers the service on a security-enhanced infrastructure that customers trust worldwide. With the previous infrastructure, it took a week or longer to procure the hardware and software required to get a customer up and running. On Windows Azure, PaperTracer can allocate compute and storage resources quickly, onboarding new customers in one or half a day. But Tarpley reiterated that trust is the key factor in connecting with international customers. “They see the Microsoft name, and they know that everything has been put in place to help safeguard their data,” he said. “That’s invaluable for our continued success.” More information on PaperTracer’s move to Windows Azure is available in the Microsoft case study and the Microsoft Customer Spotlight Newsroom. Founded in 1975, Microsoft (Nasdaq: MSFT) is the worldwide leader in software, services and solutions that help people and businesses realize their full potential.

Employee Theft

Former Cessna Employee Sentenced to 18 Months for Stealing Parts from Airplanes

U.S. Attorney’s Office March 05, 2012

District of Kansas (316) 269-6481

— filed under: Intellectual Property Theft, Press Release, White-Collar Crime

WICHITA, KS—A former Cessna employee has been sentenced to 18 months in federal prison for selling stolen aircraft parts on eBay, U.S. Attorney Barry Grissom said today. He also was ordered to pay $130,000 restitution.

Diego Alejandro Paz-Teran, 35, Wichita, Kansas, pleaded guilty to one count of interstate transportation of stolen property. In his plea, Paz-Teran admitted he stole aircraft parts from Cessna and sold them on eBay. According to court documents, the investigation began in November 2008 when an employee of a Rockwell Collins Company distributor saw a Collins AHC-3000 Attitude Reference Computer offered for sale on eBay for $9,000. Knowing that the part was valued at more than $45,000, he contacted the seller and asked for serial numbers. Cessna tracked the serial numbers to a part that was removed from an XLS Plus aircraft while it was being painted.

Investigators found other stolen aircraft parts being sold on the same eBay account and followed records on the account to Teran at his home in Wichita.

Grissom commended the U.S. Department of Transportation-Office of Inspector General, the Sedgwick County Sheriff’s Office, the Federal Bureau of Investigation, and Assistant U.S. Attorney Matt Treaster for their work on the case.

News Release from the U.S. Chamber of Commerce

Release Date: Feb 21, 2012Contact: 888-249-NEWS

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U.S. Chamber Applauds Announcement of U.S.-Korea Trade Agreement Implementation

WASHINGTON D.C.—The U.S. Chamber of Commerce applauded the administration and the U.S. Trade Representative today for their announcement that the U.S.-Korea Free Trade Agreement (KORUS) will enter into force on March 15, 2012.  The landmark trade agreement that would support more than 70,000 export-related jobs was ratified last October through a bipartisan vote in Congress.

“The U.S. business community commends our negotiators for staying the course on implementing a groundbreaking trade deal with South Korea that will create American jobs and boost American competitiveness,” said Thomas J. Donohue, president and CEO of the U.S. Chamber. “We will now be able to play on a level playing field in South Korea’s dynamic market and start creating tens of thousands of new jobs here at home.”

Upon entry into force, tariffs will be eliminated on nearly 80% of U.S. exports of industrial products and nearly two-thirds of U.S. exports of agricultural products to South Korea.  It will also break down non-tariff barriers and strengthen transparency and intellectual property protections in South Korea so that American companies can compete fairly in the South Korean market.

“It is now up to the business community, including the hundreds of thousands of small and medium sized enterprises that make up the backbone of the U.S. economy, to take full advantage of this agreement to grow American exports,” Donohue said. “This agreement is the foundation for moving bipartisan, job-creating policies forward, and we urge the administration to build on the positive momentum of the South Korea trade agreement to continue opening up markets abroad.”

The Chamber is continuing to advocate for implementation of the trade agreements with Colombia and Panama on a commercially sound basis as soon as possible.

The U.S. Chamber of Commerce is the world’s largest business federation representing the interests of more than 3 million businesses of all sizes, sectors, and regions, as well as state and local chambers and industry associations.

Chinese Official to Hear Trade Theft Tale

Excerpt from an article in The New York Times
Wednesday, February 15, 2012

Chinese Official to Hear Trade Theft Tale 

By JONATHAN WEISMAN

WASHINGTON — China’s next leader, Xi Jinping, may never have heard of American Superconductor Corporation before he arrived here Monday, but by the end of his visit United States officials hope to make the small Massachusetts wind-energy company an object lesson in the impact of Chinese trade secret theft on American business.

Senator John Kerry, chairman of the Senate Foreign Relations Committee and a Massachusetts Democrat, plans to raise personally with Mr. Xi the case of a company that saw 70 percent of its business evaporate last year after a Chinese partner enticed one of its employees to steal the crown jewel of its technology.

“It’s a very clear and, in our judgment, egregious, palpable demonstration of the practice that we are deeply concerned about,” Mr. Kerry said, “but it’s not the only one. There are so many things: cyberattacks, access-to-market issues, espionage, theft. These are major points of discussion between us and China.”

Both President Obama and Vice President Joseph R. Biden Jr. warned Mr. Xi on Tuesday that they had been hearing more and more from United States businesses about intellectual property and trade secret theft, but they did not specifically mention American Superconductor. However, background material on the company’s experience was included in briefing papers distributed before the arrival in Washington of Mr. Xi’s delegation, and a top administration official said the Chinese were aware of United States frustration over the case.

A New Question of Internet Freedom

Excerpt from an article in The New York Times

Monday, February 06, 2012

A New Question of Internet Freedom

By DAVID JOLLY

PARIS — European activists who participated in American Internet protests last month learned that there was political power to be harnessed on the Web. Now they are putting that knowledge to use in an effort to defeat new global rules for intellectual property.

In the U.S. protests, Web sites including Wikipedia went dark Jan. 18, and more than seven million people signed Google’s online petition opposing the Stop Online Piracy Act and the Protect Intellectual Property Act. Ultimately, even the bills’ sponsors in the U.S. Congress backed down under the onslaught of public criticism.

The European activists are hoping to use similar pressure to stop the international Anti-Counterfeiting Trade Agreement , or ACTA, which is meant to clamp down on illegal commerce in copyrighted and trademarked goods. Opponents say that it will erode Internet freedom and stifle innovation. About 1.5 million people have signed a Web petition calling for the European Parliament to reject ACTA, which some say is merely SOPA and PIPA on an international level. Thousands of people have turned out for demonstrations across Europe, with more scheduled for next Saturday.

After more than three years of talks, which critics say were conducted without sufficient public input , the United States signed on to ACTA last October in Tokyo, along with Australia, Canada, Japan, Morocco, New Zealand and South Korea. (The agreement is to come into force when six of those countries have ratified it.)

But the issue moved into the mainstream in Europe after the European Union and representatives of 22 of 27 E.U. members — all except Cyprus, Estonia, Germany, the Netherlands and Slovakia — signed Jan. 26.

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