Latest Release of Synopsys IC Validator Delivers Faster Manufacturing Compliance For 20nm and Below

Press release:

Latest Release of Synopsys IC Validator Delivers Faster Manufacturing Compliance For 20nm and Below

Advances Include Faster Runtime, ECO Flows and New Process Modeling Technology

MOUNTAIN VIEW, Calif., Sept. 6, 2012 /PRNewswire/ --
Highlights:

• Qualified by leading foundries for 20 nanometers (nm)
• Successful in numerous tapeouts targeted for 20nm
• Introduces new double patterning (DPT) decomposition checking and pattern matching technologies for optimal compliance with foundry manufacturing requirements 
• Enables reduced verification turnaround time with demonstrated scalability to 64 cores and beyond
• Expands In-Design technology for automatic DRC/DPT repair and 2X faster ECOs

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced the release of IC Validator 2012.06, Synopsys' physical verification platform for advanced process nodes. With immediate availability of qualified rule decks by leading foundries, IC Validator 2012.06 offers new technologies that enable physical signoff verification at advanced process nodes. IC Validator 2012.06 continues to build on Synopsys' approach of speeding design closure through In-Design physical verification with Synopsys' IC Compiler^™ place and route solution, enabling place-and-route engineers to eliminate late stage surprises and manual repairs. New additions to the In-Design flow, targeted for 20nm and below, include DPT and pattern matching technology. This latest release of IC Validator also offers a significant performance boost for verifying large and complex 20-nm designs. By maximizing the utilization of mainstream computing hardware through innovative techniques, IC Validator can enable engineers to parallelize design rule checks (DRCs) on 64 processing cores and beyond, thereby significantly reducing verification turnaround time for these advanced process nodes.
"To address the complexities of 20nm process, we are actively expanding the use of In-Design Physical verification with IC Compiler and IC Validator for our new designs," said Kyu-Myung Choi, senior vice president of Infrastructure Design Center, Samsung Electronics.
Enabling Physical Verification at 20nm and BelowTo address the stringent manufacturing requirements of 20-nm design, IC Validator 2012.06 introduces several new advances in process modeling technology:

• Double Patterning: The limitations of current lithographic technology require layout to be split into two masks of alternating structures. IC Validator features a fast and accurate, native decomposition ("coloring") engine. IC Validator can perform decomposition checks during design and can also drive automatic fixing of violations with IC Compiler via the In-Design technology. IC Validator can also perform the final signoff quality check alongside the final design rule check.
• Pattern Matching: Occasionally layout patterns can generate lithography hotspots, leading to accidental open or short connections. IC Validator's patented pattern-matching technology augments DRC with intuitive 2D multi-shape pattern analysis for ultra-fast detection of manufacturing hotspots. It can also drive automatic fixing of these hotspots with IC Compiler. Leading manufacturers will thus be able to achieve better process margins and higher yields for the 20-nm process node.

Improving Design Turnaround TimeIC Validator is being broadly used by design teams for In-Design physical verification with IC Compiler. This release complements IC Compiler 2012.06, allowing users to benefit from 2X faster ECO and automatic design repair (ADR) flows. New additions to In-Design technology also make it possible for designers to perform layout enhancement for yield natively within IC Compiler, streamlining the design flow and eliminating wasteful iterations.
In addition to being used for In-Design verification, IC Validator is also fully qualified for physical signoff at leading foundries across a broad range of process technologies. IC Validator 2012.06 deploys a range of distributed multiprocessing techniques to achieve optimal utilization of available hardware. These technologies, including multi-threading, on-demand load balancing and memory-aware scheduling, have demonstrated scalability to 64 cores and beyond. With this release, customers designing at advanced process nodes can now benefit from a significant productivity boost and faster turnaround times.
"IC Validator 2012.06 is the most noteworthy release for our physical verification product line to date," said Antun Domic, senior vice president and general manager of Synopsys' implementation group. "Beyond enabling verification of the highly complex 20-nanometer process technology node at Samsung and other leading foundries with a multitude of new technologies, we have added significant improvements in runtime, scalability and In-Design productivity that will benefit our entire customer base."
About SynopsysSynopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.

Synopsys' Open-Source Liberty Format to Incorporate On-Chip Variation Extensions

Press release:

Synopsys' Open-Source Liberty Format to Incorporate On-Chip Variation Extensions

Collaborating with Standards Board Industry Leaders to Ensure Broad Ecosystem Enablement

MOUNTAIN VIEW, Calif., Sept. 5, 2012 /PRNewswire/ --
Highlights:

• OCV extensions help standardize usage of the popular stage-based Advanced OCV (AOCV) modeling approach for 40- and 28-nm
• Liberty Technical Advisory Board expected to finalize and ratify new extensions in November 2012

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced it intends to incorporate on-chip variation (OCV) extensions in its open-source Liberty™ library format, the de-facto modeling standard  for integrated circuit (IC) implementation and signoff. The new extensions will help standardize usage of the popular stage-based Advanced OCV (AOCV) modeling approach for 40- and 28-nm processes nodes. The final format extensions and ratification as part of the Liberty standard will be completed with the guidance and assistance of the Liberty Technical Advisory Board.
The Liberty library format is the semiconductor industry's most widely adopted library standard used by virtually all EDA implementation, analysis and library characterization tools as the library model exchange for timing, noise, power and test behavior.  In May 2006, an industry-wide Liberty Technical Advisory Board was formed to facilitate the evolution of the Liberty library modeling standard. The Liberty Technical Advisory Board functions under the auspices of the IEEE Industry Standards and Technology Organization (IEEE-ISTO). Its 14 member companies represent the broad semiconductor industry including the design community, EDA companies, silicon foundries, and semiconductor intellectual property (IP) companies. A complete list of members can be found at http://opensourceliberty.org/liberty_techadvisory.html. Liberty is available for download to the entire semiconductor design community under standard open-source terms. The latest Liberty syntax specifications and tools can be found at http://www.opensourceliberty.org.
"Standardizing the Liberty format extensions through the Liberty Technical Advisory Board allows the design community and EDA tool suppliers an opportunity to contribute and participate in the standardization process," said Rich Goldman, vice president of corporate marketing and strategic alliances, Synopsys. "In the past 2 years, the Liberty Technical Advisory Board has helped guide the ratification of over 10 new additions to Liberty to improve design for low-power flows."
The standardization of on-chip variation extensions via the Liberty Technical Advisory Board will benefit the semiconductor industry by:

• Allowing broad participation from the design community and EDA tool suppliers on final format
• Ensuring a fast path to a standard that meets the growing needs of EDA tool and IP Library providers
• Providing a foundation and structure for future collaboration and evolution of on-chip variation extensions

AvailabilityThe Liberty Technical Advisory Board is expected to finalize and ratify the OCV extensions to Liberty in November 2012, making it available to open-source licensees shortly thereafter.

• Learn more about Open Source Liberty at: http://www.opensourceliberty.org

About SynopsysSynopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Seventh Annual International Microelectronics Olympiad of Armenia to be Hosted by Synopsys in Cooperation with IEEE TTTC

Press release:

Seventh Annual International Microelectronics Olympiad of Armenia to be Hosted by Synopsys in Cooperation with IEEE TTTC

Participation by the world's largest professional engineering association highlights the Olympiad's growing international reputation

YEREVAN, Armenia, Aug. 9, 2012 /PRNewswire/ -- Synopsys, Inc., a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that the Seventh Annual International Microelectronics Olympiad of Armenia will be held on October 4, 2012 in Yerevan, Armenia. For the first time, the event will be held in cooperation with the Institute of Electrical and Electronics Engineers (IEEE) Test Technology Technical Council (TTTC). IEEE's participation highlights the contest's growing international reputation.
Initiated in 2006, the Olympiad is held under the patronage of the Prime Minister of Armenia. Synopsys Armenia CJSC is the general organizer and a sponsor of the Olympiad. The general sponsor is Vivacell-MTS, Armenia's leading mobile operator. The Olympiad is also sponsored by Unicomp CJSC, Enterprise Incubator Foundation, Microsoft RA, Union of Manufacturers and Businessmen of Armenia, Union of Information Technology Enterprises, Arminco CJSC, Viasphere Technopark and INGO ARMENIA ICJSC.
In keeping with the theme of "Meeting the Challenges of Design and Test," the contestants in the Olympiad will compete in the areas of digital IC design and test, analog and mixed-signal IC design and test, semiconductor devices and technology, and mathematic and algorithmic issues of electronic design automation (EDA).
Guided by the motto "Recognize the best, inspire the next," the Olympiad aims to highlight the brightest, most talented engineers under the age of 30. The Olympiad goals are to stimulate further development of microelectronics in Armenia and in the participating countries by: recognizing and inspiring talented engineers; increasing interest in microelectronics among young specialists; discerning the level of knowledge of participants in the field of microelectronics in order to make necessary adjustments to regional educational programs; and creating a community of young specialists involved in microelectronics.
"The first Armenian Microelectronics Olympiad in 2006 attracted 82 participants. The event has since grown to an international contest including numerous award categories and 349 participants from 12 countries," said Rich Goldman, the president of the Olympiad Organizing Committee, CEO of Synopsys Armenia and vice president for Corporate Marketing and Strategic Alliances at Synopsys. "Working with IEEE will enable further growth. As one of the world's most respected and recognized professional engineering societies, the IEEE sponsors more than 1000 annual conferences and meetings in 81 countries and is highly involved in the technical program development of numerous events including trade shows, training workshops, and job fairs. IEEE's recognition of the Olympiad also benefits Armenia by highlighting it as a Center of Excellence for Microelectronics Education."
"This collaboration is a win-win-win situation for IEEE, for the Olympiad, and for Armenia as a country," said Dr. Yervant Zorian, president of the IEEE TTTC and chief architect at Synopsys. "The involvement of IEEE, the largest organization of electrical and electronic engineers, helps the Olympiad gain more international recognition. The Olympiad contributes to IEEE's efforts to encourage and support an interest in technology in young adults; holding the contest in Armenia highlights the country's technical leadership."
"The IEEE TTTC's decision to endorse the Annual International Microelectronics Olympiad is a key acknowledgement of its success in promoting technology development in this region over the past six years," said Vazgen Melikyan, president of the Olympiad Program Committee, director of Synopsys Armenia Educational Department (SAED), honorable scientist of Armenia and Sc.D. professor. "I am confident the cooperation of IEEE TTTC will result in a significantly greater number of highly knowledgeable participants from around the globe."
About IEEE TTTCIEEE is the world's largest professional association dedicated to advancing technological innovation and excellence for the benefit of humanity. Sponsored by IEEE's Computer Society, TTTC is a dedicated council to serve the global test technology professional community through a series of annual conferences, standards, publications, educational and professional activities. For more information, please visit http://tab.computer.org/tttc
About Synopsys Armenia CJSC and Synopsys, Inc. Synopsys, Inc. is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP), prototyping and services used in semiconductor design, verification and manufacturing. Synopsys established a presence in Armenia in 2004 as Synopsys Armenia closed joint stock company (CJSC). Synopsys Armenia CJSC provides R&D and product support in EDA, design for manufacturing (DFM) and the development of semiconductor intellectual property (IP). Employing several hundred qualified Armenian engineers, Synopsys is one of largest IT employers in Armenia. To encourage the highest levels of accomplishment for students in IT, the company sponsors awards and competitions such as theAnnual Educational Awards of the Republic of Armenia (RA) President, and the Annual International Microelectronics Olympiad of Armenia. Synopsys Armenia's investment in the community reaches well beyond IT. In 2010, Synopsys in Armenia was recognized as one of 12 finalists for the U.S. Secretary of State's annual Award for Corporate Excellence (ACE), citing the company's technology and financial leadership as well as its charity work and volunteer activities. Synopsys Armenia CJSC is located in Yerevan. Synopsys, Inc. is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys, Inc. and Synopsys Armenia online at http://www.synopsys.com andhttp://www.synopsys.am.